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MIT Alewife Project

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Description: Large-scale multiprocessor, integrates cache-coherent, distributed shared memory, and user-level message-passing, in one integrated hardware framework; papers, people, pictures, posters.
is a large-scale multiprocessor that integrates both cache-coherent, distributed shared memory and user-level message-passing in a single integrated hardware framework. Each , an off-the-shelf FPU, 64 kbytes of direct-mapped cache, and 4 Mbytes of globally-shared main memory. The nodes communicate via messages on a two-dimensional mesh network. The current implementation scales directly to 512 nodes.
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Page title:MIT Alewife Project: Home Page
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activated: 23-May-1985
last updated: 17-May-2013
expires: 31-Jul-2014